Senior Hardware Systems Engineer - LPU Platform Pathfinding
NVIDIA · Santa Clara, United States · 5d ago
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Are you ready to push the boundaries of innovation and engineering? At NVIDIA, we lead the world in accelerated computing—driving progress in AI, graphics, and high‑performance systems.
As a Senior Hardware Systems Engineer, you will help build next‑generation LPU (Language Processing Unit) platforms that support the most demanding AI workloads. You’ll work with teams across the company to shape system architecture, solve complex challenges, and strengthen the hardware foundation for large‑scale AI. We are committed to an inclusive, collaborative environment where people grow, contribute, and make an impact every day!
What You Will Be Doing:
Drive hardware pathfinding for LPU platforms by leading early investigations into new architectures for power delivery, cooling, mechanical design, and high‑bandwidth interconnects.
Guide system‑level technical decisions that influence NVIDIA’s LPU roadmap.
Work with silicon, architecture, data center, cloud, product, and manufacturing teams to deliver complete, production‑ready systems.
Lead full‑stack system debug, addressing electrical, mechanical, thermal, firmware, OS, and application behaviors.
Support program execution, tracking issues, driving root‑cause analysis, and ensuring timely resolution.
Own interconnect and cooling architecture, including optical links, backplanes, power distribution, and cluster‑level cooling systems.
What We Need to See:
Bachelor’s or Master’s degree in Electrical Engineering, Mechanical Engineering, or related field (or equivalent experience).
8+ years of proven experience leading platform, system, or hardware engineering efforts from concept through delivery.
Broad system knowledge in electrical/power design, mechanical/thermal engineering, firmware integration, and performance tuning.
Experience in pathfinding, evaluating early designs and maturing them into real solutions.
Strong debugging and problem‑solving skills across hardware and software boundaries.
Clear communication and the ability to align diverse engineering groups.
Exposure to large‑scale AI platforms such as LPU, GPU, TPU, or custom accelerators.
Ways to Stand Out from the Crowd:
Direct experience designing or validating LPU, GPU, or other accelerator systems, especially at rack or cluster scale.
Ownership of first‑of‑kind system designs, such as new power networks, liquid cooling, or optical interconnects.
Leadership in pathfinding or advanced development programs that shaped product direction.
Familiarity with hyperscale data center infrastructure, including cooling methods, facility power, and interconnect fabrics.
Strength in early bring‑up, diagnostics, signal integrity, and rapid prototyping as well as participation in industry standards efforts or cross‑company technical initiatives.
Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 184,000 USD - 287,500 USD.You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.