PMIC Systems and Validation Engineer, Staff

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

PMIC Systems & Validation Engineer

Team & Product Overview:

Qualcomm's Power Management Systems, Validation & Integration team (PMIC-SVI) leads the industry in the system architecture and post-silicon validation of high-performance feature-rich Power Management Integrated Circuits (PMICs), that are embedded in our Chipsets - for smartphones, tablets, laptops, wearables and a variety of cutting-edge consumer electronics. This team gets to work on state-of-art technology to enable products with world’s leading brands.

A typical Qualcomm PMIC is a highly advanced IC that has a multitude of IPs viz. switching DC-DC converters, linear regulators, clock oscillators, battery charger, fuel gauge, LED drivers, and ADCs. Additionally, there is an embedded mini-processor running critical firmware (FW) to support power sequencing, interrupt servicing, crash handling and various device reset scenarios. It is also responsible for maintaining various stability & performance related configurations that are part of SoC software driver initializations. Furthermore, it provides an intelligent-framework for sequencing of time-critical-operations, which otherwise can't be guaranteed by any OS / higher-level software. Often, Qualcomm chipset solutions contain multiple PMICs working together in sync – which together constitute a ‘PMIC-System’.

Job Responsibilities

This job involves a mix of Architecture, HW Systems, Functional Validation, Chipset integration & customer issue debug support. We are looking for Systems & Validation engineers with preferably 8 years of experience in analog/power electronics. Depending on your experience level and area of technical expertise you will own and participate in systems definition, HW/SW debugging and validation of PMIC solutions by partnering with various engineering teams like Analog/Digital Design, Software and Customer Engineering in a fast-paced environment.

Systems involves coming up with a Top-Level specification (involving HW/FW/SW level partitioning of feature-design, HW Register interfaces, memory sizing, protocol selection, multi-PMIC connectivity grid, debug framework support, etc) to satisfy all chipset level requirements.

Validation involves coming up with a comprehensive functional validation plan (that covers both manual and scripted automated test cases), executing them within stipulated time-period, analyzing results at HW-level (via signal measurements), debugging issues & creating reports.

Engineers will be responsible to perform risk assessment of development and validation plans; and interact with PMIC Product Management, Design & Characterization teams; other SoC HW/SW Architecture, Development & Validation teams; and finally Customer-Engagement teams across worldwide sites.

Education Requirements

A Bachelor's degree in Electronics related Engineering is a must.

Master’s degree is preferred esp. with specialization in VLSI / Microelectronics, Power Management, etc.

Minimum Qualifications

We are looking for applicants with 8+ years of job-experience – relevant to various HW/S aspects of any electronic product development. They should be well-versed with knowledge of entire ASIC Flow (from concept-stage to commercial-product support).

Preferred Qualifications

Applicants should be aware of fundamentals of PMIC, Power Management, Microcontroller architecture, basic-firmware & HW-SW interaction.

Applicants should also have strong hands-on lab-experience in Post-Si Validation. (HW-level Bench measurement and/or SW-level logs-based verification).

Preferred Skills:

· Hands-on ability & comfort in using various lab instruments like oscilloscopes, power supplies, JTAG debuggers etc.

· Good understanding of PMIC, Power Electronics , digital & embedded electronics concepts

· Good Hardware Debug Skills related to DC -DC (SMPS, LDO) converters preferred.

· Good programming skills in at least one of the following: C#, F#, Python, Perl, LabVIEW or any other scripting language (used in VLSI/Embedded Domain) + understanding of few OOPS concepts.

· Familiarity with HW schematics and ability to trace inter connections on a PCB. Good analytical & communication (verbal/written) skills.

· Ability to seek information pro-actively, understand priorities and juggle multiple tasks in a highly paced environment.

· Experience in automating test-cases via SW-control for HW-systems Ability to come up with a High-Level Strategy for any objective and being able to break it into Mid-level flows & Low-level tasks – for efficient execution.

· Prior experience in leading & executing white-box validation efforts of a HW-module or sub-module, is a big plus.

· Exposure to Assembly-language programming (for microcontroller) is good-to-have. Exposure to tools like JIRA and GIT are a plus.

Keywords PMIC, Power Systems, System Architecture, switch mode power supply, SMPS, DC-DC, LDO, ADC, functional Validation, test automation, Voltage Regulators, Battery Chargers, Battery Management/Gauging

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