Synthesis Engineer

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

Job Description:  

• Should have strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools.

• Experience with writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure.

• Experience in all aspects of timing closure for multi-clock domain designs.

• Should be familiar with MCMM synthesis and optimization.

• Should have good understanding of low-power design implementation using UPF.

• Experience with scripting language such as Perl/ Python, TCL.

• Experience with different power optimization flows or technique such as clock gating.

• Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation

• Should be able to handle ECOs and formal verification and maintain high quality matrix

• 2+ yrs experience

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Level of Responsibility:

•    Works independently with minimal supervision.

•    Provides supervision/guidance to other team members.

•    Decision-making may affect work beyond immediate work group.

•    Requires verbal and written communication skills to convey information. May require basic negotiation, influence, tact, etc. 

•    Tasks require multiple steps which can be performed in various orders; some planning, problem-solving, and prioritization must occur to complete the tasks effectively.

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