CPU System and Compute Die Architect
Qualcomm · Austin, United States +3 · 9d ago
Company:
Qualcomm Technologies, Inc.Job Area:
Engineering Group, Engineering Group > CPU EngineeringGeneral Summary:
Mission
We are dedicated to transforming industry by reimagining silicon and developing next-generation computing platforms. By joining our team, you’ll collaborate with world-class engineers to create innovative solutions that push the limits of performance, energy efficiency, and scalability. Our focus is on developing server-class high performance solutions that are highly optimized for the needs of the server product.
Position: CPU Systemand Compute DieArchitect
We are hiring talented engineers for CPU System Architecture focusing on various aspects of CPU System like Interrupt, Timer, address map, coherent and Non-coherent NoC protocols, Debug and RAS (Reliability, Availability, Serviceability) aspectsalong with understanding of impact of multi-die systemfor high performance, low powerarchitectures. In this role, you will work with architects and SW teams to conceive ofmicro-architecture and help withtheproduct definition through early involvement in the product life cycle.
The ideal candidate will have extensive knowledge of CPU and SoC architecture across various product segment –DatacenterServer, Mobile, Compute and Auto SoCs, including experience in microarchitecture and design of coherent CPU systems. CPU system architecture involves micro-architecture and deployment of data, control and debug features using interconnects, deploying various solutions forRAS andDebug and tracearchitecture. Strong analytical, problem-solving, and communication skills are essential for excelling in this position.
Required for this Role:
MS degree in Computer or Electrical Engineering with15+ yearsof CPUand SoCarchitectureorsimilar experience.
Deep knowledge of microprocessor architecture, with expertise in one or more of the following areas:
CPU system features: interconnect protocols, timer synchronization, interrupt controller, configuration access protocols, RAS and safety mechanisms
Comprehending compute dies and the complexities involved in designing a CPU with multiple diesalong withDie-to-Diechannel understanding
Power and performance telemetry solutions:Architecture and performance monitoring, telemetry architecture
Architecture and Micro-architectureDebugand Trace architecture, scan-dump, and memory dump mechanismsand understanding of various DFxtechnologies
Excellent technical documentation skills, along with strong written and verbal communication abilities
Understanding of various Software and Firmware control loops and building system level solutions.
Solid understanding of logic design principles, including timing and power implications
Preferred qualifications
MS degree in Computer or Electrical Engineering.
Understanding of CPU and cluster architecture.
Understanding of high-performance and low power micro-architecture techniques and trade-offs in CPU microarchitecture.
Minimum Qualifications:
• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 8+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.OR
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 7+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
OR
PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Key Responsibilities
Work with chip architects to understand architecture concepts and high-level system requirements
Take on a leadership role in developing the micro-architecture and design of high-performance CPU system
Prepare and present clear and comprehensive technical documentation to meet the needs of stakeholders, including engineering teams, senior management and internal partners.
Develop High-Level Architecture and Micro-Architecture specifications that can translate to RTL design.
Collaborate with HW, SW and FW architects to develop an optimal end-to-end CPU System architecture
Performance exploration. Explore high performance strategies working with the CPU modeling team.
Collaborate with software, firmware, and platform teams to enable CPU system features in products.
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Pay range and Other Compensation & Benefits:
$216,600.00 - $325,000.00The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.