DDR IP validation and Firmware development (Senior/Lead/Staff)
Qualcomm · Bangalore, India · 17d ago
Company:
Qualcomm India Private LimitedJob Area:
Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Understand the IP architecture, work with IP Design/Verification teams to understand the validation requirements, develop/port/enhance the validation software content and bring up.
Develop good quality Firmware, understand complex SW scenarios and debug the Firmware issues.
Interface with Design/Software and other teams for the test plan and debugs.
Validate the IP Functionality, expose weakness, find bugs and root cause them
Use silicon debug hooks to measure power/performance/coverage and other KPI metrics
Work with minimal Supervision. Mentor/guide junior co-workers.
Good verbal and written communication skills
MINIMUM QUALIFICATIONS:
Bachelor's/Master's degree in Electrical/Electronics/Computer science Engineering.
2 - 10 years Hardware Engineering experience or related work experience.
Excellent understanding of Embedded systems, Soc Architecture, Processor Architecture and Memory interfacing.
Excellent C expertise and hands-on experience on Firmware development/debug
Must have Experience in IP Validation
Experience in DDR and other High speed protocols is added advantage.
Exposure to working on emulation/pre-si environment.
Exposure to instruments like oscilloscope, Logic analyzer or any other instruments.
Using JTAG based debuggers, compilers/linkers
Should have good exposure to software development life cycle-Exposure to SoC architecture paradigms interconnects, power management,
Knowledge of JTAG based debuggers/compilers/linkers.
Software development for silicon enablement, silicon validation
Exposure to scripting language preferably python
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