LPASS Design Verification Engineer
Qualcomm · Bangalore, India · 25d ago
Company:
Qualcomm India Private LimitedJob Area:
Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.
Minimum Qualifications:
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.Qualcomm LPASS HW team in Bangalore is part of a worldwide team responsible for developing and delivering Audio solutions which are setting the benchmark in mobile computing industry. The role of LPASS DV Engineer will involve a deep understanding of the HW architecture while getting an opportunity to work with the latest DV tools and technologies.
Individual responsibility will include
DV ownership of one or more features in the Low power audio subsystem(LPASS) core
Developing a robust testbench, optimized for the specific feature/DUT
Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches and process improvements.
Ensure a bug free silicon for Tape Out which eventually leads to a superb user experience of Snapdragon based computing devices
For better understanding of some of our products, please refer to the links below
https://www.qualcomm.com/products/smartphones
Minimum Qualifications
Minimum 1 - 2 years of VLSI industry experience
Strong debugging and analytical skills
Strong knowledge of HDLs like Verilog, System Verilog
Proficiency in developing SV/UVM based test benches
Proficient in debugging RTL/TB issues using Verdi or similar tools
Proficient with scripting languages such as Perl and(or) Python
Preferred Qualifications *
Knowledge of UPF, low power architecture
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