WIFI PHY Senior Design Verification Engineer
Qualcomm · Bangalore, India · 1mo ago
Company:
Qualcomm India Private LimitedJob Area:
Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.
Minimum Qualifications:
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
QCT's Bangalore Wireless R&D (WRD) HW team in Bangalore is looking for experienced Wireless HW design verification engineers to work on Qualcomm’s best in class chipsets for mobile phones, wearables and IOT . Candidate will be working with ASIC designs on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI Verification cycle like Testbench architecture, Verification Planning, Testbench and Test development, Verification closure with best-in-class methodologies. In this role of WRD Verification Engineer, you will be verifying Wifi and/or Modem from both TX and RX perspective.
The responsibilities will majorly include:
Understanding of Wireless systems PHY TX and RX design paths, Algorithms that control the various aspects of wireless systems.
Own complete IP/Block/SS level DV.
Own end to end DV tasks from design analysis, Verification Plan development , Coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals.
Explore innovative DV methodologies (formal, simulation and emulation based) to continuously improve the quality and efficiency of test benches.
Successful candidate will be required to collaborate with worldwide design, architecture teams and other stake holder to achieve all project goals. Hence, strong communication skills are a must.
Skills/Experience:
2-4 years of strong experience in design verification
Strong knowledge of System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology
Proven experience of building or maintaining a medium to complex SV/UVM environments
Proven experience of writing efficient constraint random tests
Prior Experience in verifying WIFI, Modem PHY layer is a strongly desirable.
Strong debugging and analytical skills and independent problem-solving ability
Proficient in debugging RTL/TB issues using Verdi or similar tools
Experience in formal / static verification methodologies will be a plus
Good understanding of Wireless protocols, Modem/Wifi Standards is a plus
Experience with Power Aware verification, GLS, and scripting languages such as Perl, Python is a plus.
Experience in formal / static verification methodologies will be a plus
Preferred Qualifications:
Understanding of Wireless protocols, Modem/Wifi Standards
Experience in IP verification of DSP related HW blocks.
Knowledge on scripting languages such as Perl and(or) Python
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